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Voltage Detector ICs
Bipolar Voltage Detector ICs
BD47G series
No.10006ECT05
Description The BD47G Series is a reset IC that was developed to prevent system errors at transient state when the power of CPU or logic circuit switches ON/OFF or momentary shut down. These ICs consist of three terminals (power supply, GND and reset output) to detect power supply voltages and outputs reset signals of various systems. These ICs are ultra-compact and are realized low current consumption, making them ideal for portable products. Features 1) Detection voltage range: 0.1-volt step line-up 1.9~4.6V (Typ.) 2) High accuracy voltage detection: 1% 3) Low current consumption 4) Open collector "L" reset output 5) Compact SSOP5 package Applications All electronic devices that use microcontrollers and logic circuits Selection Guide No. Specifications Detection Voltage Description Example: Voltage range over 1.9V~4.6V in 0.1V increments. 2.9V is marked as "29"
Part Number : BD47
1
G
1
Lineup Marking B2 B1 BZ BY BX BW BV BU BT BS Detection Voltage 4.6V 4.5V 4.4V 4.3V 4.2V 4.1V 4.0V 3.9V 3.8V 3.7V Part Number BD4746 BD4745 BD4744 BD4743 BD4742 BD4741 BD4740 BD4739 BD4738 BD4737 Marking BR BQ BP B4 BN BM BL BK BJ B3 Detection Voltage 3.6V 3.5V 3.4V 3.3V 3.2V 3.1V 3.0V 2.9V 2.8V 2.7V Part Number BD4736 BD4735 BD4734 BD4733 BD4732 BD4731 BD4730 BD4729 BD4728 BD4727 Marking BH BG BF BE BD BC BB BA Detection Voltage 2.6V 2.5V 2.4V 2.3V 2.2V 2.1V 2.0V 1.9V Part Number BD4726 BD4725 BD4724 BD4723 BD4722 BD4721 BD4720 BD4719
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BD47G series
Absolute maximum ratings (Ta=25C) Parameter Power Supply Voltage Output Voltage *1 *2 Power Dissipation Operating Temperature Ambient Storage Temperature
Technical Note
Symbol Vcc-GND Vout Pd Topr Tstg
Limits -0.3 ~ +10 -0.3 ~ +10 540 -40 ~ +75 -55 ~ +125
Unit V V mW C C
*1 When a ROHM standard circuit board (70mmx70mmx1.6mm glass epoxy board) is mounted. *2 When used at temperatures higher than Ta=25C, the power is reduced by 5.4mW/C
Electrical characteristics (Unless Otherwise Specified Ta=25C) Parameter Detection Voltage Temperature Coefficient Of Detection Voltage Detection Hysteresis Voltage Transfer Delay Time "H" Transfer Delay Time "L" Reset Output Voltage "L" Circuit Current ON Circuit Current OFF Threshold Operating Voltage Output Leak Current Reset Output Current "L" Symbol Vs Vs/T Vs tPLH tPHL VOL Icc1 Icc2 VOPL IL IOL Vcc=HL Condition RL=4.7k Min. Vs (T) x0.99 30 3.0 Limit Typ. Vs (T) 0.01 50 20 60 0.1 1.5 1.6 0.65 15.0 Max. Vs (T) x1.01 100 50 120 0.4 3.0 3.2 0.85 0.1 Unit V %/C mV s s V A A V A mA
RL=4.7kTa=-20~+75C Designed Guarantee RL=4.7k, VccLHL CL=100pFRL=4.7k *1 CL=100pFRL=4.7k *2 Vcc=Vs(min.)-0.05V, RL=4.7k Vcc=Vs(min.)-0.05V, RL= Vcc=Vs(typ.)/0.85V, RL= RL=4.7kVOL0.4V Vcc=VOUT=10V Vo=0.4V, Vcc=Vs(min.)-0.05V
Vs(T):Standard Detection Voltage1.9V to 4.6V, 0.1V step R:Pull-up resistor to be connected between VOUT and power supply. CL:Capacitor to be connected between VOUT and GND. *1 tPLH:Vcc=(Vs(typ.)-0.4V)(Vs(typ.)+0.4V) *2 tPHL:Vcc=(Vs(typ.)+0.4V)(Vs(typ.)-0.4V) Designed Guarantee.(Outgoing inspection is not done on all products.)
Block Diagrams
VCC
5
TOP VIEW
PIN No.
Symbol N.C. SUB GND VOUT VCC
Function Unconnected Terminal Substrate* GND Reset Output Power Supply Voltage
4 VOUT
1 2
Vref SSOP5
3
3 4 5
*Substrate Pin should be connected with GND
GND
Fig.1
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2010.04 - Rev.C
BD47G series
Reference Data (Unless specified otherwise, Ta=25C)
Technical Note
CIRCUIT CURRENT ICC [A]
OUTPUT VOLTAGE VOUT [V]
9 8 7 6 5 4 3 2 1 0 0 1 2 3
BD4729G
"LOW" OUTPUT CURRENT IOL [mA]
10
800 700 600 500 400 300 200 100 0 0 5 10 15 20 25 30 OUTPUT VOLTAGE VOUT[mV] IOL=12.194mA at Vo=400mV BD4729G
6 BD4729G 5 4 3 2 1 0 0 1 2 3 4 5 6 VCC SUPPLY VOLTAGE VcC[V]
VS=2.90V
VS=2.95V dVS=50mV
Icc1=1.34A Icc2=1.46A 4 5 6 7 8 9 10
VCC SUPPLY VOLTAGE VCC[V]
Fig.2 Circuit Current
1000 OUTPUT VOLTAGE VOUT [mV] DETECTION VOLTAGE VS[V] 900 800 700 600 500 400 300 200 100 0 0 0.5 1 1.5 2 2.5 VOPL=0.675V BD4729G 3.5
Fig.3 "Low" Output Current
2.5
Fig.4 I/O Characteristics
BD4729G 3.3 3.1 -0.007%/ 2.9 2.7 2.5 2.3 -20 -10 0 10 20 30 40 50 60 70 80 TEMPERATURE Ta[]
CIRCUIT CURRENT WHEN ON ICC1[mA]
BD4729G 2.0 1.5 1.0 0.5 0.0 -20 -10 0 10 20 30 40 50 60 70 80 TEMPERATURE Ta[]
~ ~
VCC SUPPLY VOLTAGE VCC[V]
Fig.5 Operating Limit Voltage
Fig.6 Detection Voltage
Fig.7 Circuit Current when ON
CIRCUIT CURRENT WHEN OFF I CC2[mA]
2.5 BD4729G 2.0 1.5 1.0 0.5 0.0 -20 -10 0 10 20 30 40 50 60 70 80 TEMPERATURE Ta[]
MINIMUM OPERATION VOLTAGE VOPL[V]
0.9 0.8 0.7 0.6 0.5 0.4 -20 -10 0 10 20 30 40 50 60 70 80 TEMPERATURE Ta[] OUTPUT VOLTAGE VOUT [mV] BD4729G
500 BD4729G 400 300 Ta=-20 200 100 Ta=25 0 0 1 2 3 4 5 "LOW" OUTPUT CURRENT IOL[mA] Ta=75
Fig.8 Circuit Current when OFF
Fig.9 Operating Limit Voltage
Fig.10 Output Saturation Voltage
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2010.04 - Rev.C
BD47G series
Technical Note
Explanation of Operation BD47G series has the detection voltages and release voltages as threshold voltages and, as the voltages applied to the input reach their respective threshold voltages, the output switches from "High" to "Low" and from "Low" to "High". The release voltage has a hysteresis that is the detection voltage +50mV (Typ.), preventing chattering in the output. When the input is greater than the release voltage, the output is in a "High" state. When the input is lowered from that state, the output switches to "Low" on the detection voltage. When the input is less than the detection voltage, the output is in a "Low" state. When the input is raised from that state, the output switches to "High" with the release voltage. Additionally, at least 0.85V is required for the circuit to operate fully. When the input falls below the operating limit voltage, the output becomes unsettled.
VDD
VDD VS+VS VS VOPL 0V
VOUT
VOH TPHL VOL TPLH TPHL TPLH

Fig.11 Timing Waveform
When the power supply is turned on, the output is unsettled from after over the operating limit voltage (VOPL) until TPHL. Therefore it is possible that the reset signal is not outputted when the rise time of Vcc is faster than TPHL. 2 When Vcc is greater than VOPL but less than the reset release voltage (VS + VS), the output voltages will switch to Low. 3 If Vcc exceeds the reset release voltage (VS + VS), then VOUT switches from L to H. 4 If Vcc drops below the detection voltage (VS) when the power supply is powered down or when there is a power supply fluctuation, VOUT switches to L (with a delay of TPHL). 5 The potential difference between the detection voltage and the release voltage is known as the hysteresis width (VS). The system is designed such that the output does not flip-flop with power supply fluctuations within this hysteresis width, preventing malfunctions due to noise. Please be aware that when there is resistance on the power supply line, the detection voltage varies with voltage drops caused by the IC current consumption. Please connect a capacitor between VCC and GND when the power supply line has high impedance.
1
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2010.04 - Rev.C
BD47G series
Technical Note
Circuit Applications 1) The following is an example of an application circuit using Reset IC for normal power supply detection. BD47G series requires a pull up resistor on the output terminal. The pull up resister value should be decided. As the application with enough confirmation of power supply level and output current capability. When a capacitor has been inserted into the output terminal to delay the output time or to remove noise, the output will be slower during starting or stopping. Please be careful to select the appropriate pull up resistors, output current and capacitor when inserting a bypass capacitor between input and GND. Please be aware that if an extremely large capacitor is used, the response time will become excessively slow.
VDD
VCC
5 microcontroller
4 VOUT
Reset Pin

Vref BD47G GND
3
Fig.12
2)
The following shows an example of adding delay time to a reset signal. It is possible to set the delay time using the capacitor CL and the resistor RL connected to the output terminal as shown below. At VCC start up, CL will be charged by RL. The CL and RL time constants and the threshold voltage of the Reset terminal determine the charge delay time. When VCC is decreased, CL is discharged through the Reset IC. The sum of the respective times plus the delay time of the IC itself becomes the reset signal delay time.
VCC RL BD47G VOUT
VDD
RESET
CPU Micro-controller
CL GND GND
VCC
VCC VS+VS VS 0V
VOH
RESET (=VOUT)
VOL
TPLH
TPHL
TPLH
Fig.13
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2010.04 - Rev.C
BD47G series
Technical Note
Operation Notes 1. Absolute maximum range Absolute Maximum Ratings are those values beyond which the life of a device may be destroyed. We cannot be defined the failure mode, such as short mode or open mode. Therefore a physical security countermeasure, like fuse, is to be given when a specific mode to be beyond absolute maximum ratings is considered. 2. GND potential GND terminal should be a lowest voltage potential every state. Please make sure all pins, which are over ground even if, include transient feature. Electromagnetic Field Mal-function may happen when the device is used in the strong electromagnetic field.
3.
4.
Bypass Capacitor for Noise Rejection Please put into the capacitor between VCC pin and GND, to reject noise. If extremely big capacitor is used, transient response might be late. Please confirm sufficiently for the point.
5.
Short Circuit between Terminal and Soldering Don't short-circuit between Output pin and VCC pin, Output pin and GND pin, or VCC pin and GND pin. When soldering the IC on circuit board, please be unusually cautious about the orientation and the position of the IC. When the orientation is mistaken the IC may be destroyed. This IC has extremely high impedance terminals. Small leak current due to the uncleanness of PCB surface might cause unexpected operations. Application values in these conditions should be selected carefully. If the leakage is assumed between the VOUT terminal and the GND terminal, the pull-up resistor should be less than 1/10 of the assumed leak resistance.
6.
7. External parameters The recommended parameter range for RL is 2k~1M. There are many factors (board layout, etc) that can affect characteristics. Please verify and confirm using practical applications. 8. Power on reset operation Please note that the power on reset output varies with the Vcc rise up time. Please verify the actual operation. Precautions for board inspection Connecting low-impedance capacitors to run inspections with the board may produce stress on the IC. Therefore, be certain to use proper discharge procedure before each process of the test operation. To prevent electrostatic accumulation and discharge in the assembly process, thoroughly ground yourself and any equipment that could sustain ESD damage, and continue observing ESD-prevention procedures in all handing, transfer and storage operations. Before attempting to connect components to the test setup, make certain that the power supply is OFF. Likewise, be sure the power supply is OFF before removing any component connected to the test setup.
9.
10. When the power supply, is turned on because of in certain cases, momentary Rash-current flow into the IC at the logic unsettled, the couple capacitance, GND pattern of width and leading line must be considered.
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2010.04 - Rev.C
BD47G series
Part Number Selection
Technical Note
B
D
4
7
1
9
G
T
R
Bipolar Reset
Detection Voltage Example: 1.9V19
SSOP5 Package
Taping Specifications Embossed Taping
SSOP5
2.90.2
5 4
+6 4 -4

Tape Quantity Direction of feed Embossed carrier tape 3000pcs TR
The direction is the 1pin of product is at the upper right when you hold
+0.2 1.6 -0.1
2.80.2
1
2
3
0.2Min.
( reel on the left hand and you pull out the tape on the right hand
1pin
)
+0.05 0.13 -0.03
1.25Max.
S +0.05 0.42 -0.04 0.95 0.1 S
1.10.05
0.050.05
Direction of feed
(Unit : mm)
Reel
Order quantity needs to be multiple of the minimum quantity.
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2010.04 - Rev.C
Notice
Notes
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